Apparatus for determining memory cell data states

An apparatus, comprising:

• an array of memory cells;
• and
• a controller for access of the array of memory cells, wherein the controller is configured to cause the apparatus to:
• sense a data state of a memory cell, of the array of memory cells, for N iterations to determine N instances of data, wherein N is an integer value greater than or equal to three, wherein each iteration of the N iterations corresponds to a respective instance of data of the N instances of data, and wherein the N instances of data each indicate a respective data value for the memory cell selected from a group consisting of a first data value, and a second data value different than the first data value;
• and
• deem the data state of the memory cell to have the first data value in response to a majority of the N instances of data indicating the first data value for the memory cell.

An apparatus, comprising:

• an array of memory cells;
• and
• a controller for access of the array of memory cells, wherein the controller is configured to cause the apparatus to:
• apply a sense voltage level to a respective control gate of each memory cell of a plurality of memory cells of the array of memory cells;
• and
• for each memory cell of the plurality of memory cells:
• generate N determinations whether that memory cell is deemed to activate or deactivate while applying the sense voltage level, wherein N is an integer value greater than or equal to three;
• deem that memory cell to have a threshold voltage in a first range of threshold voltages lower than the sense voltage level in response to a majority of the N determinations for that memory cell indicating activation of that memory cell;
• and
• deem that memory cell to have a threshold voltage in a second range of threshold voltages higher than the sense voltage level in response to a majority of the N determinations for that memory cell indicating deactivation of that memory cell.