Forward looking algorithm for vertical integrated cross-point array memory
AssigneeMicron Technology, Inc.
InventorFerdinando Bedeschi
Life of this patent
Estimating the term…
Loading patent…
AssigneeMicron Technology, Inc.
InventorFerdinando Bedeschi
Estimating the term…
Systems and methods for reading a first and second plurality of memory cells include applying a first ramping voltage with a first increment for each ramping step to read the first plurality of cells, counting, among the first plurality of cells at each ramping step, a first number of logic 1 cells, comparing the first number with a threshold at each ramping step of the first ramping voltage, determining a first voltage reached by the first ramping voltage, at the first voltage the first number becoming equal to or higher than the threshold for the first time, applying a second voltage lower than the first voltage to read the second plurality of cells, and applying a second ramping voltage ramping up from the second voltage with a second predetermined increment lower than the first predetermined increment for each ramping step to read the second plurality of cells.
A method for reading a memory array having a first and second plurality of cells, the method comprising:
A memory device comprising:
A method for reading a memory array, the method comprising:
Dependencies are inferred from the claim text.