Memory circuit and word line driver

A memory circuit, comprising:

• a plurality of word lines;
• a word line driver electrically connected to the word lines, the word line driver comprising:
• a plurality of first electronic components;
• and
• a plurality of second electronic components each having a first terminal and a second terminal, wherein the first terminal of each of the second electronic components is electrically connected to a respective first electronic component of the plurality of first electronic components, and to a respective word line of the plurality of word lines:
• a first conductive line electrically connected to the second terminal of each of the second electronic components,
• wherein the first conductive line has a length proportional to the number of the word lines;
• and
• a clamping circuit electrically connected to the first conductive line at a node, wherein the clamping circuit comprises:
• a second conductive line having a first terminal and a second terminal opposite to the first terminal;
• a delay chain having a first terminal configured to receive a first clock signal and a second terminal electrically connected to the first terminal of the second conductive line, and
• a logic circuit configured to provide a reset signal based on the first clock signal and a second clock signal from the second terminal of the second conductive line.

A memory circuit, comprising:

• a plurality of bit lines;
• a plurality of word lines;
• a first conductive line electrically connected to the word lines, wherein the first conductive line has a first length proportional to the numbers of the word lines;
• a second conductive line having a second length proportional to the number of the bit lines;
• and
• a clamping circuit configured to clamp the first conductive line at a predetermined bias at a standby mode of the memory circuit,
• wherein the clamping circuit is electrically connected to the second conductive line, wherein the predetermined bias is determined based on the length of the second conductive line.