Gate driver on array circuit and display panel
AssigneeWuhan China Star Optoelectronics Technology Co., Ltd.
InventorYou Pan
Life of this patent
Estimating the term…
Abstract
A Gate Driver on Array (GOA) circuit and a display panel are provided. The GOA circuit includes a plurality of cascaded GOA units. An Nth stage GOA unit includes a pull-up control circuit, a pull-up output circuit and a scan direction control circuit. The scan direction control circuit can be controlled by the clock signal to realize the alternating forward and backward scanning. The output terminal of the scan direction control circuit is connected with the output terminal of the pull-up control circuit, and the output terminal potential of the pull-up control circuit can be alternately changed.
Claims19
A Gate Driver on Array (GOA) circuit, comprising a plurality of cascaded GOA units, an Nth stage GOA unit comprising:
- a high voltage level line, configured to transmit high voltage level signal;
- an Nth stage scan line, configured to transmit an Nth stage scan signal;
- a first transistor, having a first electrode coupled to the high voltage level line;
- a second transistor, having a first electrode coupled to the high voltage level line;
- a third transistor, having a gate coupled to a second electrode of the first transistor and a second electrode of the second transistor, and a first electrode coupled to the Nth stage scan line;
- a first clock line, configured to transmit a first clock signal;
- a second clock line, configured to transmit a second clock signal;
- a fourth transistor, having a first electrode coupled to the first clock line, and a gate coupled to the first electrode;
- a fifth transistor, having a first electrode coupled to a second electrode of the fourth transistor, and a second electrode coupled to the second electrode of the first transistor;
- a sixth transistor, having a first electrode coupled to the second clock signal, and a gate electrode coupled to the first electrode;
- and
- a seventh transistor, having a first electrode coupled to a second electrode of the sixth transistor, and a second electrode coupled to the second electrode of the second transistor.
A Gate Driver on Array (GOA) circuit, comprising a plurality of cascaded GOA units, an Nth stage GOA unit comprising:
- a pull-up control circuit, having an input end fed with a high voltage level signal, and a control end fed with an (N−2)th stage scan signal and an (N+2)th stage scan signal;
- a pull-up output circuit, having a control end coupled to an output end of the pull-up control circuit, an input end coupled to an Nth stage clock signal, and an output end outputting coupled to an Nth stage scan signal;
- and
- a scan direction control circuit, having an input end fed with an (N−2)th stage clock signal and an (N+2)th stage clock signal, an output end coupled to the control end of the pull-up control circuit, and a control end fed with a forward scan control signal, a backward scan control signal, the (N−2)th stage clock signal and the (N+2)th stage clock signal.
Dependencies are inferred from the claim text.