Display panel and display device

A display panel, comprising p pixel unit groups, each of the p pixel unit groups comprising q rows of pixel units, both p and q being integers greater than or equal to 2;

• wherein pixel units in a same group are simultaneously supplied with a gate scan signal by a same shift register;
• and pixel units in a same group and in a same column are supplied with data voltage signals through different data lines, respectively;
• the display panel further comprises N clock signal lines, N being an even number greater than or equal to 4, and p being greater than or equal to 2N;
• wherein each shift register is connected to one of the N clock signal lines, shift registers connected to different clock signal lines are different, and the q rows of pixel units in each group are adjacent to each other;
• wherein pixel units in a same row are connected to a same gate line;
• each shift register comprises q shift register units, and the shift register units are connected to gate lines in one-to-one correspondence;
• and
• wherein each shift register unit comprises a cascade signal output terminal and a signal output terminal, a signal output by the cascade signal output terminal and a signal output by the signal output terminal are the same as each other and are synchronous, the cascade signal output terminal is configured to be connected to a pull-up reset signal terminal of a shift register unit in a previous stage and a signal input terminal of a shift register unit in a next stage, and the signal output terminal is configured to be connected to a corresponding gate line.