Loop support extensions
AssigneeIntel Corporation
InventorsAnant Nori, Shankar Balachandran, Sreenivas Subramoney, Joydeep Rakshit, Vedvyas Shanbhogue, Avishaii Abuhatzera, Belliappa Kuttanna
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AssigneeIntel Corporation
InventorsAnant Nori, Shankar Balachandran, Sreenivas Subramoney, Joydeep Rakshit, Vedvyas Shanbhogue, Avishaii Abuhatzera, Belliappa Kuttanna
Estimating the term…
Techniques for processing loops are described. An exemplary apparatus at least includes decoder circuitry to decode a single instruction, the single instruction to include a field for an opcode, the opcode to indicate execution circuitry is to perform an operation to configure execution of one or more loops, wherein the one or more loops are to include a plurality of configuration instructions and instructions that are to use metadata generated by ones of the plurality of configuration instructions; and execution circuitry to perform the operation as indicated by the opcode.
An apparatus comprising:
A non-transitory machine-readable medium storing at least one instruction which when processed by a processor is to cause the processor to perform a method comprising:
A system apparatus comprising:
Dependencies are inferred from the claim text.