Non-volatile memory device and a method for operating the same

A non-volatile memory device, comprising:

• a first bit-line coupled to a first memory cell and a first string select transistor;
• a second bit-line coupled to a second memory cell and a second string select transistor;
• a third bit-line coupled to a third memory cell and a third string select transistor, wherein the third bit-line is disposed between the first bit-line and the second bit-line;
• a first precharge circuit coupled to the first bit-line, and including a first precharge transistor that is configured to operate based on a first precharge signal;
• a second precharge circuit coupled to the second bit-line, and including a second precharge transistor that is configured to operate based on a second precharge signal;
• a third precharge circuit coupled to the third bit-line, and including a third precharge transistor that is configured to operate based on a third precharge signal;
• a first discharge circuit coupled to the first bit-line and configured to discharge a first precharge voltage applied to the first bit-line based on a first discharge signal;
• a second discharge circuit coupled to the second bit-line and configured to discharge a second precharge voltage applied to the second bit-line based on a second discharge signal;
• a third discharge circuit coupled to the third bit-line and configured to discharge a third precharge voltage applied to the third bit-line based on a third discharge signal;
• and
• a control logic circuit configured to:
• generate the first to third precharge signals and the first to third discharge signals;
• turn on, during a first time period, each of the first to third precharge transistors to apply each of the first to third precharge voltages to each of the first to third bit-lines;
• turn off, during a second time period, each of the first precharge transistor and the second precharge transistor to bring each of the first bit-line and the second bit-line into a floating state, and maintain the third precharge transistor in a turned-on state to maintain the third bit-line in a precharged state;
• control, during a third time period, the first discharge circuit to discharge the first bit-line to a ground voltage, and control each of the second discharge circuit and the third discharge circuit to maintain each of the second bit-line and the third bit-line in the precharged state;
• and
• apply, during a fourth time period, a program voltage to a gate electrode of each of the first to third string select transistors.

A method for operating a non-volatile memory device, comprising:

• turning on each of a plurality of precharge transistors of the non-volatile memory device to precharge each of a plurality of bit-lines of the non-volatile memory device to a first voltage;
• turning off first precharge transistors coupled to even-numbered bit-lines of the plurality of bit-lines among the plurality of precharge transistors, and maintaining second precharge transistors coupled to odd-numbered bit-lines of the plurality of bit-lines among the plurality of precharge transistors in a turned-on state;
• discharging first bit-lines among the even-numbered bit-lines to a second voltage, and maintaining second bit-lines among the even-numbered bit-lines, and the odd-numbered bit-lines in a precharged state;
• and
• applying a program voltage to gate electrodes of string select transistors coupled to the plurality of bit-lines,
• wherein the first voltage is greater than an internal power voltage of a page buffer of the non-volatile memory device.