US 12,112,048 B2 · Adaptive tuning of memory device clock rates based on dynamic parameters

Abstract

The present disclosure generally relates to improving adaptive tuning of different clock rates of a memory device. Rather than clock rates only being determined off of one parameter such as workload, the clock rates now will be determined using multiple parameters. The tuning may be based on system parameters to allow the system to withstand challenges that arise during the operation. The clock frequency table is maintained in the device controller. The table holds the clock frequency of each component. The disclosure proposes modifying the table according to different system environment parameters to maintain performance or reduce power consumption. Adaptive tuning allows a more flexible system design that can adapt according to the current system status. Adaptive tuning also reduces peak power consumption, improves performance, and better quality of service (QoS) compatibility characteristics.

Claims19

Dependent claims

A data storage device, comprising:

a memory device;
and
a controller coupled to the memory device, wherein the controller includes an adaptive frequency table that has different clock rates for different data storage device elements as a function of bit error rate (BER), wherein the controller is configured to:
assess system parameters;
determine that BER has changed;
select clock frequency operating parameters from the adaptive frequency table based upon the changed BER;
and
update clock frequency of at least one controller component based upon the selected clock frequency.

5 more elements

Dependencies are inferred from the claim text.

Adaptive tuning of memory device clock rates based on dynamic parameters

Life of this patent

Adaptive tuning of memory device clock rates based on dynamic parameters

Life of this patent

Abstract

Claims19