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US 12,111,784 B2Granted
NoC buffer management for virtual channels
AssigneeXilinx, Inc.
InventorsKrishnan Srinivasan, Abbas Morshed, Sagheer Ahmad
Life of this patent
Estimating the term…
Abstract
Embodiments herein describe a NoC where its internal switches have buffers with pods that can be assigned to different virtual channels. A subset of the pods in a buffer can be grouped together to form a VC. In this manner, different pod groups in a buffer can be assigned to different VCs (or to different types of NoC data units), where VCs that transmit wider data units can be assigned more pods than VCs that transmit narrower data units.
Claims20
An integrated circuit, comprising:
- a first hardware circuit;
- a second hardware circuit;
- and
- a network on a chip (NoC) communicatively coupling the first hardware circuit and the second hardware circuit, the NoC comprising:
- a plurality of switches, each switch comprising a plurality of ports, each port comprising a buffer,
- wherein the buffer comprises a plurality of pods divided into multiple pod groups, at least a subset of the pod groups configured to be a different size, and each pod group assigned to a different virtual channel of a plurality of virtual channels based on a width of each of the plurality of virtual channels.
3 more elements
A method, comprising:
- receiving a network on a chip (NoC) data unit at a port of a switch in a NoC;
- identifying a virtual channel corresponding to the NoC data unit;
- storing, in a buffer in the switch, the NoC data unit in a pod group assigned to the virtual channel, wherein the buffer comprises a plurality of pods divided into multiple pod groups, at least a subset of the pod groups configured to be a different size, and each pod group assigned to a different virtual channel of a plurality of virtual channels based on a width of each of the plurality of virtual channels;
- and
- updating a pointer for the pod group based on storing the NoC data unit in the pod group.
2 more elements
An integrated circuit, comprising:
- a first hardware circuit;
- a second hardware circuit;
- and
- a network on a chip (NoC) communicatively coupling the first hardware circuit and the second hardware circuit, the NoC comprising:
- a plurality of switches, each switch comprising a plurality of ports, each port having a buffer,
- wherein the buffer comprises a plurality of pods divided into multiple pod groups assigned to different types of NoC data units, at least a subset of the pod groups configured to be a different size, and each pod group assigned to a different virtual channel of a plurality of virtual channels based on a width of each of the plurality of virtual channels.
3 more elements
Dependencies are inferred from the claim text.