Silent cache line eviction
AssigneeMicron Technology, Inc.
InventorsTony M. Brewer, Dean E. Walker
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsTony M. Brewer, Dean E. Walker
Estimating the term…
System and techniques for silent cache line eviction are described herein. A memory device receives a memory operation from a host. The memory operation establishes data and metadata in a cache line of the memory device upon receipt. The metadata is stored in a memory element that corresponds to the cache line. Later, an eviction trigger to evict the cache line is identified. Then, in response to the eviction trigger, current metadata of the cache line is compared with the metadata in the memory element to determine whether the metadata has changed. the cache line can be evicted without writing to backing memory in response to the metadata being unchanged.
An apparatus comprising:
A method comprising:
A non-transitory machine readable medium including instructions that, when executed by processing circuitry, cause the processing circuitry to perform operations comprising:
Dependencies are inferred from the claim text.