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US 12,111,727 B2Granted
Apparatuses, systems, and methods for forced error check and scrub readouts
AssigneeMicron Technology, Inc.
InventorSujeet Ayyapureddi
Life of this patent
Estimating the term…
Abstract
A memory may perform a sequence of ECS operations to read a codeword, detect and correct any errors, and write the corrected codeword back to the memory array. An ECS circuit may count errors which are detected, and set a value of one or more ECS registers in a mode register if the count exceeds a threshold filter at the end of the ECS cycle. The memory also includes a forced ECS readout circuit, which responsive to a command, for example from a controller, sets the value(s) in the ECS register(s).
Claims20
An apparatus comprising:
- an error check and scrub (ECS) register configured to store a value;
- an ECS circuit configured to set the value of the ECS register based at least in part on a count value, the count value indicative of a number of times an error is detected in a memory array of a memory;
- and
- an ECS readout circuit configured to set the value of the ECS register to a value that indicates at least a threshold number of errors based at least in part on an external command, wherein the value is set regardless of the count value.
1 more element
A system comprising:
- a controller configured to provide a multi-purpose command;
- and
- a memory configured to receive the multi-purpose command, the memory comprising:
- an error check and scrub (ECS) readout circuit configured to set a value of an ECS register based at least in part on the multi-purpose command, wherein the value is set regardless of a status of an ECS cycle.
1 more element
A method comprising:
- providing a multi-purpose command to a memory;
- and
- forcing an update of a register value of an error check and scrub (ECS) register based at least in part on the multi-purpose command, the forcing of the update of the register value occurring regardless of a status of an ECS cycle.
Dependencies are inferred from the claim text.