Memory repair method and apparatus based on error code tracking
AssigneeRambus Inc.
InventorsFrederick A. Ware, Ely Tsern
Life of this patent
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Abstract
A memory module is disclosed that includes a substrate, a memory device that outputs read data, and a buffer. The buffer has a primary interface for transferring the read data to a memory controller and a secondary interface coupled to the memory device to receive the read data. The buffer includes error logic to identify an error in the received read data and to identify a storage cell location in the memory device associated with the error. Repair logic maps a replacement storage element as a substitute storage element for the storage cell location associated with the error.
Claims20
A memory module, comprising:
- a substrate;
- at least one integrated circuit (IC) memory device disposed on the substrate;
- and
- an IC buffer chip, the IC buffer chip including:
- primary interface circuitry to receive write data from a memory controller along primary data paths;
- comparison circuitry to compare information associated with the write data to known failure information;
- data extraction circuitry, if the comparison circuitry identifies a correlation between the information associated with the write data and the known failure information, to extract a portion of the write data corresponding to the correlation and to store the portion of the write data in substitute storage;
- and
- secondary interface circuitry to transfer the write data for storage in the at least one memory device along secondary data paths.
A memory module, comprising:
- a substrate;
- at least one integrated circuit (IC) memory device disposed on the substrate;
- and
- buffer circuitry including:
- primary interface circuitry to receive write data from a memory controller along primary data paths;
- repair circuitry to detect a correlation between information associated with the write data and known failure information, the repair circuitry to extract a portion of the write data corresponding to the correlation and to store the portion of the write data in substitute storage;
- and
- secondary interface circuitry to transfer the write data for storage in the at least one memory device along secondary data paths.
A memory module, comprising:
- multiple dynamic random access memory (DRAM) devices organized into groups;
- multiple integrated circuit (IC) buffer chips to buffer data transfers between the multiple DRAM devices and a memory controller, each of the IC buffer chips including:
- a primary interface to receive write data from the memory controller along primary data paths;
- repair circuitry to detect a correlation between information associated with the write data and known failure information, the repair circuitry to extract a portion of the write data corresponding to the correlation and to store the portion of the write data in substitute storage;
- and
- secondary interface circuitry coupled to a group of the multiple DRAM devices via secondary data paths to transfer the write data for storage in the group of the multiple DRAM devices.
Dependencies are inferred from the claim text.