Delay synchronization processing device and signal processing device including same
AssigneeLG Electronics Inc.
InventorJongin Choi
Life of this patent
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Abstract
The present disclosure relates to a delay synchronization processing apparatus and a signal processing apparatus provided with same. The delay synchronization processing apparatus according to one embodiment of the present disclosure comprises: a delay device to generate a random number and to delay an input asynchronous N-bit signal based on the generated random number; and a synchronization processor configured to perform synchronization processing on the asynchronous N-bit signal delayed by the delay device. Accordingly, errors during non-synchronous bit signal processing can be detected.
Claims18
A delay synchronization processing device comprising:
- a delay device configured to generate a random number and to delay an input asynchronous N-bit signal based on the generated random number;
- a synchronization processor configured to perform synchronization processing on the asynchronous N-bit signal delayed by the delay device;
- a second synchronization processor configured to perform synchronization processing on the input asynchronous N-bit signal;
- and
- a first switch, which in response to a delay synchronization selection signal, is configured to transmit the input asynchronous N-bit signal to the delay device or the second synchronization processor.
A signal processing device comprising a delay synchronization processing device,
- wherein the delay synchronization processing device comprises:
- a delay device configured to generate a random number and to delay an input asynchronous N-bit signal based on the generated random number;
- and
- a synchronization processor configured to perform synchronization processing on the asynchronous N-bit signal delayed by the delay device,
- wherein the delay synchronization processing device further comprises:
- a second synchronization processor configured to perform synchronization processing on the input asynchronous N-bit signal;
- and
- a first switch, which in response to a delay synchronization selection signal, is configured to transmit the input asynchronous N-bit signal to the delay device or the second synchronization processor.
Dependencies are inferred from the claim text.