Automated circuit generation

A computer system for generating a transistor comprising:

• one or more processors;
• and
• a non-transitory computer-readable storage medium having stored thereon computer executable instructions, which when executed by the computer system, cause the computer system to perform a method comprising:
• receiving information specifying a transistor to be generated, said information comprising an on resistance of the transistor to be generated;
• determining a total width of a gate of the transistor to be generated based at least on the on resistance;
• determining a first width, a number of fingers (F), and a number of device cells (P) based on the total width;
• generating a transistor level schematic comprising one or more transistors configured with the first width and the number of fingers (F);
• and
• generating a layout, wherein the layout comprises P device cells, each device cell comprising a plurality of gates corresponding to said number of fingers (F), each gate having said first width, wherein the device cells are configured in a two-dimensional array.

A non-transitory computer-readable storage medium having stored thereon computer executable instructions, which when executed by a computer system, cause the computer system to:

• receive information specifying a transistor to be generated, said information comprising an on resistance of the transistor to be generated;
• determine a total width of a gate of the transistor to be generated based at least on the on resistance;
• determine a first width, a number of fingers (F), and a number of device cells (P) based on the total width;
• generate a transistor level schematic comprising one or more transistors configured with the first width and the number of fingers (F);
• and
• generate a layout, wherein the layout comprises P device cells, each device cell comprising a plurality of gates corresponding to said number of fingers (F), each gate having said first width, wherein the device cells are configured in a two-dimensional array.