Multi-bit scan chain with error-bit generator
AssigneeArm Limited
InventorsAnil Kumar Baratam, Yves Thomas Laplanche
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Abstract
Various implementations described herein are directed to a device having a scan chain that receives a multi-bit input, provides a multi-bit output, and provides a multi-bit multiplexer output based on the multi-bit input and the multi-bit output. The device may have an error-bit generator that receives the multi-bit multiplexer output, receives a portion of the multi-bit input, receives a portion of the multi-bit output, and provides an error-bit output based on the multi-bit multiplexer output, the portion of the multi-bit input, and the portion of the multi-bit output.
Claims20
A device comprising:
- a scan chain that receives a multi-bit input, provides a multi-bit output, and provides a multi-bit multiplexer output based on the multi-bit input and the multi-bit output;
- and
- an error-bit generator that receives the multi-bit multiplexer output, receives a portion of the multi-bit input, receives a portion of the multi-bit output, and provides an error-bit output based on the multi-bit multiplexer output, the portion of the multi-bit input, and the portion of the multi-bit output.
A device comprising:
- a mux-clock generator that generates a mux-clock signal based on an external clock signal and a scan enable signal;
- a scan chain that receives a multi-bit input, generates a multi-bit output, and generates a multi-bit multiplexer output based on the mux-clock signal, the external clock signal, the multi-bit input and the multi-bit output;
- and
- an error-bit generator that receives the external clock signal, receives the multi-bit multiplexer output, receives a portion of the multi-bit input, receives a portion of the multi-bit output, and generates an error-bit output based on the external clock signal, the multi-bit multiplexer output, the portion of the multi-bit input, and the portion of the multi-bit output.
A method comprising:
- generating a mux-clock based on an external clock and a scan enable signal;
- providing scan chain logic to receive a multi-bit input, generate a multi-bit output, and generate a multi-bit multiplexer output based on the mux-clock, the external clock, the multi-bit input and the multi-bit output;
- and
- generating an error-bit based on the external clock, the multi-bit multiplexer output, a portion of the multi-bit input, and a portion of the multi-bit output.
Dependencies are inferred from the claim text.