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US 12,034,003 B2Granted
Thin film resistor
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHung-Chih Yu, Chien-Mao Chen
Life of this patent
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Abstract
A semiconductor device includes: a metal thin film disposed on a semiconductor substrate; and first and second contact structures disposed on the metal thin film, wherein the first and second contact structures are laterally spaced from each other by a dummy layer that comprises at least one polishing resistance material.
Claims20
A semiconductor device, comprising:
- a metal thin film disposed on a semiconductor substrate;
- at least one contact structure disposed on the metal thin film,
- a dummy layer disposed on the metal thin film, wherein the dummy layer comprises at least one polishing resistance material;
- and
- a transistor gate structure disposed adjacent to the at least one contact structure, wherein the at least one contact structure, the metal thin film and the transistor gate structure are concurrently formed, wherein the at least one contact structure comprises first and second contact structures, and wherein the first and second contact structures have a p-type work function and the at least one polishing resistance material has an n-type work function and is laterally spaced apart from the first and second contact structures, respectively, by part of the dummy layer.
2 more elements
A semiconductor device, comprising:
- a semiconductor substrate;
- a first transistor disposed in a first region of the semiconductor substrate;
- and
- a thin film resistor disposed in a second region of the semiconductor substrate adjacent to the first region, the thin film resistor comprising:
- a thin film disposed on the semiconductor substrate;
- first and second contact structures disposed on respective ends of the thin film;
- a dummy layer disposed on the thin film and laterally between the first and second contact structures,
- wherein the dummy layer comprises at least one recessed region at least partially filled with a polishing resistance material;
- and
- a transistor gate structure disposed adjacent to the first contact structure, wherein the first and second contact structure, the thin film and the transistor gate structure are concurrently formed, wherein the first and second contact structures have a p-type work function and the at least one polishing resistance material has an n-type work function and is laterally spaced apart from the first and second contact structures, respectively, by part of the dummy layer.
7 more elements
A method, comprising:
- forming a metal thin film on a semiconductor substrate;
- forming two contact structures on respective ends of the metal thin film, wherein the two contact structures are laterally spaced from each other by a dummy layer;
- forming a recessed region in the dummy layer, wherein the recessed region is laterally spaced apart from the two contact structures;
- filling the recessed region with a polishing resistance material, wherein the dummy layer and the polishing resistance material are disposed on the metal thin film;
- and
- forming a transistor gate structure disposed adjacent to the first contact structure, wherein the two contact structures, the metal thin film and the transistor gate structure are concurrently formed, wherein the two contact structures comprises first and second contact structures, and wherein the first and second contact structures have a p-type work function and the at least one polishing resistance material has an n-type work function and is laterally spaced apart from the first and second contact structures, respectively, by part of the dummy layer.
3 more elements
Dependencies are inferred from the claim text.