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US 12,015,403 B2Granted
Semiconductor apparatus performing a plurality of clock signaling operations and semiconductor system including the same
AssigneeSK hynix Inc.
InventorsJi Hyo Kang, Kyung Hoon Kim
Life of this patent
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Abstract
A semiconductor apparatus includes a clock distribution network, a data output circuit, and a data input circuit. The clock distribution network receives a system clock signal and drives the system clock signal to a CMOS level and a CML level to signal in different manners. The data output circuit outputs data based on the clock signal driven to the CMOS level. The data input circuit receives data based on the clock signal driven to the CML level.
Claims18
A semiconductor apparatus comprising:
- a global dock tree configured to drive a system dock signal to a complementary metal oxide semiconductor (CMOS) level to generate a first distribution dock signal and configured to drive the system dock signal to a current mode logic (CML) level to generate a second distribution dock signal;
- a data output circuit configured to output data based on the first distribution dock signal;
- and
- a data input circuit configured to receive the data based on the second distribution clock signal.
1 more element
A semiconductor apparatus comprising:
- a global clock tree configured to:
- drive a system clock signal to a complementary metal oxide semiconductor (CMOS) level to generate a first distribution clock signal and transmit the first distribution clock signal through a first clock transmission line;
- drive the system clock signal to a current mode logic (CML) level to generate a second distribution clock signal and transmit the second distribution clock signal through a second clock transmission line;
- and
- a local clock tree configured to:
- receive the first distribution clock signal through the first clock transmission line and generate a read clock signal based on the first distribution clock signal;
- receive the second distribution clock signal through the second clock transmission line and generate a write clock signal based on the second distribution clock signal.
4 more elements
A semiconductor apparatus comprising:
- a global dock tree configured to:
- receive a system clock signal and generate a first distribution dock signal during a read operation of the semiconductor apparatus;
- and
- generate a second distribution dock signal during a write operation of the semiconductor apparatus, the second distribution dock signal swinging within a smaller range than the first distribution clock signal;
- and
- a local clock tree configured to generate a data output dock signal from the first distribution dock signal during the read operation and configured to generate a data input clock signal from the second distribution dock signal during the write operation.
3 more elements
Dependencies are inferred from the claim text.