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US 12,015,089 B2Granted
Transistors comprising two-dimensional materials and related memory cells and electronic devices
AssigneeMicron Technology, Inc.
InventorsWitold Kula, Gurtej S. Sandhu, John A. Smythe
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Abstract
A transistor comprising a channel region on a material is disclosed. The channel region comprises a two-dimensional material comprising opposing sidewalls and oriented perpendicular to the material. A gate dielectric is on the two-dimensional material and gates are on the gate dielectric. Semiconductor devices and systems including at least one transistor are disclosed, as well as methods of forming a semiconductor device.
Claims19
A transistor, comprising:
- a channel comprising a two-dimensional material directly laterally adjacent to a seed material, the channel oriented perpendicular to a base material, a width of the seed material laterally adjacent to the channel greater than a width of the channel;
- a gate dielectric directly adjacent to the two-dimensional material on a side of the channel opposite the seed material, a horizontally-oriented portion of the two-dimensional material vertically underling the gate dielectric, and an outer sidewall of the gate dielectric and an outermost lateral edge of the horizontally-oriented portion of the channel substantially vertically aligned with one another;
- and
- a gate adjacent to the gate dielectric.
1 more element
A transistor, comprising:
- a channel comprising a two-dimensional material oriented perpendicular to a base material, the two-dimensional material comprising a transition metal dichalcogenide, graphene, graphene oxide, stanene, phosphorene, hexagonal boron nitride, borophene, silicone, graphyne, germanene, germanane, a 2D supracrystal, or a combination thereof;
- a gate dielectric adjacent to the two-dimensional material, an upper surface of the gate dielectric substantially coplanar with an upper surface of the channel, a horizontally-oriented portion of the two-dimensional material vertically underling the gate dielectric, and an outer sidewall of the gate dielectric and an outermost lateral edge of the horizontally-oriented portion of the channel substantially vertically aligned with one another;
- and
- a gate adjacent to the gate dielectric.
1 more element
A memory cell, comprising:
- one or more transistors, at least one of the transistors comprising:
- an L-shaped channel comprising a two-dimensional material;
- an insulative material directly laterally adjacent to the L-shaped channel, the L-shaped channel comprising a continuously vertical sidewall along an entire length of the insulative material;
- a gate dielectric adjacent to the L-shaped channel, an upper surface of the gate dielectric substantially coplanar with an upper surface of the L-shaped channel, and a lower surface of the gate dielectric directly abutting an upper surface of a portion of the L-shaped channel along a horizontal interface therebetween;
- and
- a gate adjacent to the gate dielectric;
- and
- at least one capacitor in operative communication with the at least one transistor.
5 more elements
An electronic device, comprising:
- an array of memory cells, one or more of the memory cells comprising:
- transistors, one or more of the transistors comprising:
- an L-shaped portion of a two-dimensional material exhibiting a width of from about one monolayer of atoms to about three monolayers of atoms;
- a dielectric material adjacent to the L-shaped portion of the two-dimensional material;
- a gate dielectric laterally adjacent to the L-shaped portion of the two-dimensional material, upper surfaces of the two-dimensional material, the dielectric material, and the gate dielectric substantially coplanar with one another;
- and
- a gate adjacent to the gate dielectric;
- and
- capacitors in operative communication with the transistors.
6 more elements
Dependencies are inferred from the claim text.