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US 12,015,084 B2Granted
Field effect transistors with gate fins and method of making the same
AssigneeSanDisk Technologies LLC
InventorsMitsuhiro Togo, Takashi Kobayashi, Sudarshan Narayanan
Life of this patent
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Abstract
A field effect transistor includes at least one line trench extending downward from a top surface of a channel region which laterally surrounds or underlies the at least one line trench, a gate dielectric contacting all surfaces of the at least one line trench and including a planar gate dielectric portion that extends over an entirety of a top surface of the channel region, a gate electrode, a source region, and a drain region.
Claims20
A field effect transistor, comprising:
- at least one line trench extending downward from a top surface of a first transistor active region located in a substrate, and laterally extending along a first horizontal direction;
- a gate dielectric contacting a bottom surface and sidewalls of each of the at least one line trench and comprising a planar gate dielectric portion overlying the substrate, at least one bottom gate dielectric portion contacting a bottom surface of a respective one of the at least one line trench, and vertically-extending gate dielectric portions contacting sidewalls of the at least one line trench and connecting the planar gate dielectric portion and a respective one of the at least one bottom gate dielectric portion;
- a gate electrode comprising a planar gate electrode portion that overlies the planar gate dielectric portion and at least one gate electrode fin portion located within the at least one line trench;
- a dielectric gate spacer laterally surrounding the gate electrode and comprising at least one pair of downward-protruding portions vertically extending into the at least one line trench, wherein each downward-protruding portion of the dielectric gate spacer comprises a respective bottom surface that contacts a top surface segment of a respective bottom gate dielectric portion of the gate dielectric;
- and
- a source extension region in contact with end segments of a bottom surface and sidewalls of the at least one line trench and contacting a bottom surface of the planar gate dielectric portion.
3 more elements
A method of forming field effect transistor, comprising:
- forming at least one line trench in a transistor active region in a semiconductor substrate;
- forming a gate dielectric in the at least one line trench and over a top surface of the semiconductor substrate, wherein the gate dielectric comprises a planar gate dielectric portion overlying the substrate, at least one bottom gate dielectric portion contacting a bottom surface of a respective one of the at least one line trench, and vertically-extending gate dielectric portions contacting sidewalls of the at least one line trench and connecting the planar gate dielectric portion and a respective one of the at least one bottom gate dielectric portion;
- forming a gate electrode over the gate dielectric, wherein the gate electrode comprises a planar gate electrode portion that overlies the transistor active region and at least one gate electrode fin portion located within a center portion of the at least one line trench;
- forming a dielectric gate spacer around the gate electrode, wherein the dielectric gate spacer comprises downward-protruding portions vertically extending into a respective end portion of the at least one line trench, wherein each downward-protruding portion of the dielectric gate spacer comprises a respective bottom surface that contacts a top surface segment of a respective bottom gate dielectric portion of the gate dielectric;
- and
- forming a source region and a drain region in the semiconductor substrate by implanting electrical dopants, wherein the source region comprises a source extension region having a bottommost surface that underlies a horizontal plane including each bottom surface of the at least one line trench.
3 more elements
Dependencies are inferred from the claim text.