Semiconductor device and manufacturing method thereof

A semiconductor device, comprising:

• a semiconductor substrate and
• a memory array disposed over the semiconductor substrate, wherein the memory array comprises:
• memory cells and gate contacts disposed in rows extending along a first direction,
• isolation structures, interposed between adjacent memory cells and gate contacts of the memory array;
• and
• word lines, extending parallel to each other to intersect the rows of memory cells and gate contacts,
• wherein the memory cells comprise source contacts and drain contacts vertically stacked, and semiconductor oxide layers extending on sidewalls of the source contacts and the drain contacts,
• the gate contacts comprise lower metallic blocks, first dielectric layers, and upper metallic blocks sequentially stacked, and
• each word line comprises:
• gate sections, encircling the semiconductor oxide layers on the sidewalls of the source contacts and the drain contacts of memory cells associated with the word line;
• first connecting sections, extending on the isolation structures to interconnect the gate sections of the word line;
• a contact section, encircling a respective gate contact of the word line, the contact section directly contacting the lower metallic block of the encircled gate contact;
• and
• at least one second connecting section, extending on an isolation structure disposed between the associated gate contact and the source and drain contacts of an adjacent memory cell to interconnect the contact section with the gate section encircling the source and drain contacts of the adjacent memory cell.

A manufacturing method of a semiconductor device, comprising:

• forming pillar stacks over a semiconductor substrate, the pillar stacks comprising first metallic blocks, dielectric blocks, and second metallic blocks sequentially stacked, the first metallic blocks being closer to the semiconductor substrate;
• forming a semiconductor channel layer covering sidewalls and top surfaces of the pillar stacks;
• forming a high-k dielectric layer on the semiconductor channel layer;
• removing first portions of the semiconductor channel layer and the high-k dielectric layer to form first trenches exposing first pillar stacks of the pillar stacks;
• and
• forming strips of conductive material on the pillar stacks, wherein the strips of conductive material extend on the high-k dielectric layer remaining on second pillar stacks of the pillar stacks and directly contact the first metallic blocks of the first pillar stacks.