Gate-all-around field effect transistor having multiple threshold voltages

An apparatus, comprising:

• an n-type field effect transistor, comprising:
• a first doped conducting channel region having at least four conducting layers including an n-type dopant, the at least four conducting layers comprised of silicon;
• and
• a first gate stack surrounding all sides of the first doped conducting channel region, wherein the first gate stack comprises:
• a first doped substrate;
• a first metal doping layer deposited directly on the first doped substrate, wherein the first metal doping layer is formed from a dipole;
• and
• a first adjustment oxide layer deposited directly on the first metal doping layer;
• and
• a p-type field effect transistor, comprising:
• a second doped conducting channel region having at least four conducting layers including a p-type dopant, the at least four conducting layer comprised of silicon germanium;
• and
• a second gate stack surrounding all sides of the second doped conducting channel region, wherein the second gate stack comprises:
• a second doped substrate;
• a second metal doping layer deposited directly on the second doped substrate, wherein the second metal doping layer is formed from a dipole;
• and
• a second adjustment oxide layer deposited directly on the second metal doping layer, wherein the apparatus has a plurality of threshold voltages including at least four different n-type threshold voltages for the n-type field effect transistor that are attributed to the first metal doping layer and at least four different p-type threshold voltages for the p-type field effect transistor that are attributed to the second metal doping layer, the first metal doping layer including a metal alloy selected from the group consisting of titanium aluminum and titanium aluminum carbide.