Semiconductor device and fabrication method thereof
AssigneesSemiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
InventorNan Wang
Life of this patent
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Abstract
A semiconductor structure and a fabrication method are provided. The semiconductor structure includes: a base substrate; a gate structure on the base substrate, including a first portion in a first region and a second portion in a second region; and one or more stop layers on the base substrate and located in the first portion of the gate structure in the first region. A length of the first portion of the gate structure in the first region is larger than a length of the second portion of the gate structure in the second region.
Claims16
A semiconductor device, comprising:
- a base substrate, the base substrate including a substrate and a plurality of fins discrete from each other on the substrate;
- a gate structure on the base substrate, wherein the gate structure includes a first portion in a first region and a second portion in a second region, and a length of the first portion of the gate structure in the first region is larger than a length of the second portion of the gate structure in the second region;
- and
- a plurality of stop layers on the base substrate and located in the first portion of the gate structure in the first region, the plurality of stop layers being made of a material including SiCBN;
- wherein:
- the gate structure includes a gate dielectric layer on top surfaces and sidewalls of the plurality of fins, a work function layer on the gate dielectric layer, and a gate electrode layer on the work function layer;
- and
- the gate dielectric layer is in contact with a bottom surface of the plurality of stop layers, the work function layer and the gate electrode layer are in contact with sidewall surfaces of the plurality of stop layers.
A fabrication method of a semiconductor device, comprising:
- providing a base substrate, the base substrate including a substrate and a plurality of fins discrete from each other on the substrate;
- forming a dummy gate structure on the base substrate, wherein the dummy gate structure including a first portion in a first region and a second portion in a second region, and a length of the first portion of the gate structure in the first region is larger than a length of the second portion of the gate structure in the second region;
- etching part of the first portion of the dummy gate structure in the first region, to form a plurality of openings in the dummy gate structure in the first region, wherein bottoms of the plurality of openings expose a surface of the base substrate;
- forming a stop layer in each opening of the plurality of openings to fill up the opening, the plurality of stop layers being made of a material including SiCBN;
- removing the dummy gate structure to form a gate opening in the base substrate;
- forming an initial gate structure in the gate opening;
- and
- planarizing the initial gate structure until exposing top surfaces of the plurality of stop layers, to form a gate structure;
- wherein:
- the gate structure includes a gate dielectric layer on top surfaces and sidewalls of the plurality of fins, a work function layer on the gate dielectric layer, and a gate electrode layer on the work function layer;
- and
- the gate dielectric layer is in contact with a bottom surface of the plurality of stop layers, the work function layer and the gate electrode layer are in contact with sidewall surfaces of the plurality of stop layers.
Dependencies are inferred from the claim text.