Integrated circuit

An fT-doubler amplifier integrated circuit, comprising

• at least one first field effect transistor of the fT-doubler amplifier integrated circuit, having at least one first source contact and at least one first drain contact and at least one first gate contact, and
• at least one second field effect transistor of the fT-doubler amplifier integrated circuit, having at least one second source contact and at least one second drain contact and at least one second gate contact,
• wherein the first drain contact is connected to the second drain contact, and
• the first source contact is coupled to the second gate contact,
• wherein the first source contact, the first drain contact, the first gate contact, the second source contact, the second drain contact and the second gate contact are implemented as structured metallization layers on a single substrate, and wherein
• the first and second drain contacts share at least one single dedicated surface area on said substrate,
• wherein the first and second drain contacts are configured as a single signal output and the first gate contact is configured as a signal input,
• wherein the first source contact and the second gate contact share one single dedicated surface area on said substrate, and
• wherein the first and second drain contacts share two dedicated surface areas on said substrate, which are arranged on opposite sides of the surface area of the first source contact.

An electronic device comprising at least one fT-doubler amplifier integrated circuit, said fT-doubler amplifier integrated circuit comprising

• at least one first field effect transistor of the fT-doubler amplifier integrated circuit, having at least one first source contact and at least one first drain contact and at least one first gate contact, and
• at least one second field effect transistor of the fT-doubler amplifier integrated circuit, having at least one second source contact and at least one second drain contact and at least one second gate contact,
• wherein the first drain contact is connected to the second drain contact, and
• the first source contact is coupled to the second gate contact,
• wherein the first source contact, the first drain contact, the first gate contact, the second source contact, the second drain contact and the second gate contact are implemented as structured metallization layers on a single substrate, and wherein
• the first and second drain contacts share at least one single dedicated surface area on said substrate, and
• wherein the first and second drain contacts are configured as a single signal output and the first gate contact is configured as a signal input, and
• the first source contact and the second gate contact share one single dedicated surface area on said substrate.