Deep trench capacitor including stress-relief voids and methods of forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorFu-Chiang Kuo
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorFu-Chiang Kuo
Estimating the term…
A deep trench is formed in a substrate. A layer stack including at least three metallic electrode layers interlaced with at least two node dielectric layers is formed over the substrate. The layer stack continuously extends into the deep trench, and a cavity is present in an unfilled volume of the deep trench. A dielectric fill material layer including a dielectric fill material is formed in the cavity and over the substrate. The dielectric fill material layer encapsulates a void that is free of any solid phase and is formed within a volume of the cavity. The void may expand or shrink under stress during subsequently handling of a deep trench capacitor including the layer stack to absorb mechanical stress and to increase mechanical stability of the deep trench capacitor.
A deep trench capacitor comprising:
A semiconductor structure comprising a first semiconductor die, wherein:
A device structure comprising:
Dependencies are inferred from the claim text.