Die stack structure, semiconductor structure and method of fabricating the same

A package structure, comprising:

• a first semiconductor die comprising a first semiconductor substrate and a first interconnect structure, the first semiconductor substrate comprising a first portion and a second portion disposed on the first portion, the first interconnect structure being disposed on a top surface of the second portion, a lateral dimension of the first portion being greater than a lateral dimension of the top surface of the second portion;
• a second semiconductor die comprising a second semiconductor substrate and a second interconnect structure disposed on the second semiconductor substrate, the second semiconductor die being electrically connected with and bonded to the first semiconductor die;
• a first insulating encapsulation disposed on the first portion of the first semiconductor substrate, and laterally encapsulating the second semiconductor die and the second portion of the first semiconductor substrate;
• a first redistribution circuit structure electrically connected with the first semiconductor die and the second semiconductor die, wherein the lateral dimension of the first portion is greater than a lateral dimension of the redistribution circuit structure;
• a second insulating encapsulation laterally encapsulating the first insulating encapsulation, the first portion and the first redistribution circuit structure;
• and
• a second redistribution circuit structure disposed on the first redistribution circuit structure and the second insulating encapsulation, and electrically connected with the first redistribution circuit structure.

A die stack structure, comprising:

• a first semiconductor die comprising a first portion and a second portion, wherein the first portion is wider than the second portion;
• a second semiconductor die disposed on the second portion and electrically connected to the first semiconductor die;
• an insulating encapsulation laterally encapsulating the second semiconductor die and the second portion of the first semiconductor die;
• and
• a redistribution circuit structure electrically connected to the first semiconductor die and the second semiconductor die, wherein the first portion is wider than the redistribution circuit structure.