Method for forming overlay marks and semiconductor structure

A method for forming overlay marks, comprising:

• providing a substrate, a surface of the substrate having a mark layer and a first mask layer, the first mask layer covering a surface of the mark layer, the mark layer comprising a first mark region and second mark regions at ends of the first mark region;
• patterning the first mask layer to form a first pattern region and second pattern regions in the first mask layer, the second pattern regions being at ends of the first pattern region, the first pattern region having a plurality of first trenches, the second pattern region having a plurality of second trenches, the first mark region corresponding to the first pattern region, the second mark regions corresponding to the second pattern regions;
• forming a spacer layer covering at least side walls of the first trenches and side walls of the second trenches;
• backfilling the first trenches and the second trenches to form a second mask layer;
• removing the spacer layer on the side walls of the first trenches completely, and removing the spacer layer on the side walls of the second trenches partially, to form etching windows between the first mask layer and the second mask layer;
• and
• etching the mark layer along the etching windows to form main overlay mark grooves in the first mark region and dummy overlay mark grooves in the second mark regions simultaneously, wherein the main overlay mark grooves in the first mark region penetrate the mark layer in the direction perpendicular to the substrate, and the dummy overlay mark grooves do not penetrate the mark layer in the second mark regions;
• filling the main overlay mark grooves with a mark material to form main overlay marks and filling the dummy overlay mark grooves with the mark material to form dummy overlay marks;
• wherein feature size of the dummy overlay mark is less than or equal to the feature size of the main overlay mark.