US 12,014,951 B2 · Semi-damascene structure with dielectric hardmask layer

Abstract

A method of manufacturing a semi-damascene structure of a semiconductor device includes: forming a 1st intermetal dielectric layer; forming a 1st hardmask layer and at least one 1st photoresist pattern on the 1st intermetal dielectric layer; patterning at least one via hole penetrating through the 1st hardmask layer and the 1st intermetal dielectric using the 1st photoresist pattern; removing the 1st photoresist pattern among the 1st photoresist pattern and the 1st hardmask layer; forming a metal structure in the via hole such that the metal structure fills in the vial hole and extends on the 1st hardmask layer; patterning the metal structure to form at least one 1st trench penetrating at least the metal structure at a portion where the metal structure extends on the 1st hardmask layer; and filling the 1st trench with a 2nd inter-metal layer.

Claims11

Dependent claims

A method of manufacturing a semi-damascene structure of a semiconductor device, the method comprising:

forming a 1st intermetal dielectric layer;
forming a 1st hardmask layer and at least one 1st photoresist pattern on the 1st intermetal dielectric layer;
patterning at least one via hole penetrating through the 1st hardmask layer and the 1st intermetal dielectric using the at least one 1st photoresist pattern;
removing the at least one 1st photoresist pattern;
forming a metal structure in the at least one via hole such that the metal structure fills in the at least one via hole and extends on the 1st hardmask layer;
patterning the metal structure to form at least one 1st trench penetrating at least the metal structure at a portion where the metal structure extends on the 1st hardmask layer;
and
filling the at least one 1st trench with a 2nd intermetal dielectric layer.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application

17/390,035Filed 30 Jul 2021 · us provisional application

Priority

20 May 2021

Published

US 2022/0375785 A124 Nov 2022

Granted

18 Jun 2024

Term ends

Not estimatedThe source records don’t support an estimate.

Classification13 codes

H10W 20/074
Of dielectric parts thereof: of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or…
H10W 20/089
By forming openings in the dielectric parts: using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning
H10P 50/71
Etching of wafers, substrates or parts of devices: using masks for conductive or resistive materials
H10W 20/057
By filling conductive material into holes, grooves or trenches: by selectively depositing, e.g. by using selective CVD or plating

Semi-damascene structure with dielectric hardmask layer

Life of this patent

Semi-damascene structure with dielectric hardmask layer

Life of this patent

Abstract

Claims11