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US 12,014,793 B2Granted
Method of screening non-volatile memory cells
AssigneeSilicon Storage Technology, Inc.
InventorsViktor Markov, Alexander Kotov
Life of this patent
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Abstract
A method for screening memory cells includes erasing the memory cells, weakly programming the memory cells to a modified erased state, performing a first read operation on the memory cells after the erasing and the weakly programming, screening any of the memory cells that exhibit a read current during the first read operation below a margin read current threshold M1, baking the memory cells after the first read operation, performing a second read operation on the memory cells after the baking, and screening any of the memory cells that exhibit a read current during the second read operation below the margin read current threshold M1.
Claims9
A method for screening memory cells, comprising:
- erasing the memory cells;
- weakly programming the memory cells to a modified erased state;
- performing a first read operation on the memory cells after the erasing and the weakly programming;
- screening any of the memory cells that exhibit a read current during the first read operation below a margin read current threshold M1;
- baking the memory cells after the first read operation;
- performing a second read operation on the memory cells after the baking;
- and
- screening any of the memory cells that exhibit a read current during the second read operation below the margin read current threshold M1.
5 more elements
A method for screening memory cells, comprising:
- erasing the memory cells;
- weakly programming the memory cells to a modified erased state;
- performing a first read operation on the memory cells after the erasing and the weakly programming;
- screening any of the memory cells that exhibit a read current during the first read operation below a margin read current threshold M1;
- baking the memory cells after the first read operation;
- performing a second read operation on the memory cells after the baking;
- and
- screening any of the memory cells that exhibit a read current during the second read operation below a margin read current threshold M2;
- wherein the margin read current thresholds M1 and M2 are greater than a read reference current used to determine an erased state of the memory cells during a nominal read operation, and the margin read current threshold M2 is less than the margin read current threshold M1.
6 more elements
A method for screening memory cells, comprising:
- strongly erasing the memory cells, wherein each of the memory cells includes a control gate;
- performing a first read operation on the memory cells, after the strongly erasing, that includes applying a first read voltage to the control gates that is below a nominal read voltage for the control gates;
- screening any of the memory cells that exhibit a read current during the first read operation below a margin read current threshold M1;
- weakly programming the memory cells to a modified erased state;
- performing a second read operation on the memory cells, after the weakly programming, that includes applying a second read voltage to the control gates that is below a nominal read voltage for the control gates and greater than the first read voltage;
- screening any of the memory cells that exhibit a read current during the second read operation below the margin read current threshold M1;
- baking the memory cells after the second read operation;
- performing a third read operation on the memory cells, after the baking, that includes applying a third read voltage to the control gates that is below the nominal read voltage for the control gates and greater than the second read voltage;
- and
- screening any of the memory cells that exhibit a read current during the third read operation below the margin read current threshold M1.
7 more elements
A method for screening memory cells, comprising:
- strongly erasing the memory cells, wherein each of the memory cells includes a control gate;
- performing a first read operation on the memory cells, after the strongly erasing, that includes applying a first read voltage to the control gates that is below a nominal read voltage for the control gates;
- screening any of the memory cells that exhibit a read current during the first read operation below a margin read current threshold M1;
- weakly programming the memory cells to a modified erased state;
- performing a second read operation on the memory cells, after the weakly programming, that includes applying a second read voltage to the control gates that is below a nominal read voltage for the control gates and greater than the first read voltage;
- screening any of the memory cells that exhibit a read current during the second read operation below a margin read current threshold M2;
- baking the memory cells after the second read operation;
- performing a third read operation on the memory cells, after the baking, that includes applying a third read voltage to the control gates that is below the nominal read voltage for the control gates and greater than the second read voltage;
- and
- screening any of the memory cells that exhibit a read current during the third read operation below a margin read current threshold M3;
- wherein the margin read current thresholds M1, M2 and M3 are greater than a read reference current used to determine an erased state of the memory cells during a nominal read operation, the margin read current threshold M3 is less than the margin read current threshold M2, and the margin read current threshold M2 is less than the margin read current threshold M1.
8 more elements
Dependencies are inferred from the claim text.