Adaptive semi-circle select gate bias

A controller in communication with a memory apparatus including memory cells connected to one of a plurality of word lines and arranged in strings and configured to retain a threshold voltage, each one of the strings having at least one drain-side select gate transistor on a drain-side of the one of the strings connected to one of a plurality of bit lines and coupled to the memory cells of the one of the strings, the controller configured to:

• determine a respective unique select gate voltage for each of a plurality of groupings of the memory cells, the unique select gate voltage being individually adapted for each of the plurality of groupings of the memory cells such that a different unique select gate voltage is determined for each of the plurality of groupings;
• and
• instruct the memory apparatus to apply the respective unique select gate voltages to the at least one drain-side select gate transistor of selected ones of the strings of each of the plurality of groupings of the memory cells to turn on the at least one drain-side select gate transistor of the selected ones of the strings during a memory operation,
• wherein determining the respective unique select gate voltages includes, for each of the plurality of groupings of memory cells, (i) setting a select gate voltage as a detection threshold voltage, (ii) selectively adjusting the detection threshold voltage and setting the select gate voltage as the adjusted detection threshold voltage, and (iii) setting the respective unique select gate voltage in response to the adjusting of the detection threshold voltage.

A method of operating a memory apparatus including memory cells connected to one of a plurality of word lines and arranged in strings and configured to retain a threshold voltage, each one of the strings having at least one drain-side select gate transistor on a drain-side of the one of the strings connected to one of a plurality of bit lines and coupled to the memory cells of the one of the strings, the method comprising the steps of:

• determining a respective unique select gate voltage for each of a plurality of groupings of the memory cells, the unique select gate voltage being individually adapted for each of the plurality of groupings of the memory cells such that a different unique select gate voltage is determined for each of the plurality of groupings;
• and
• applying the respective unique select gate voltages to the at least one drain-side select gate transistor of selected ones of the strings of each of the plurality of groupings of the memory cells to turn on the at least one drain-side select gate transistor of the selected ones of the strings during a memory operation,
• wherein determining the respective unique select gate voltages includes, for each of the plurality of groupings of memory cells, (i) setting a select gate voltage as a detection threshold voltage, (ii) selectively adjusting the detection threshold voltage and setting the select gate voltage as the adjusted detection threshold voltage, and (iii) setting the respective unique select gate voltage in response to the adjusting of the detection threshold voltage.