Memory device for adjusting magnitude of signal used to precharge bit line according to position of plug hole and operating method thereof
AssigneeSK hynix Inc.
InventorJung Hyeong Kim
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AssigneeSK hynix Inc.
InventorJung Hyeong Kim
Estimating the term…
A memory device includes a memory block to which a plurality of lines are connected. The memory device also includes a plurality of memory cells respectively connected to word lines among the plurality of lines, wherein the plurality of memory cells are formed as a plurality of plug holes formed in a stack structure between a drain select line among the plurality of lines and a slit. The memory device further includes a plurality of page buffers connected to the plurality of memory cells through a plurality of bit lines among the plurality of lines. The memory device additionally includes a peripheral circuit for performing a read operation on the plurality of memory cells. The peripheral circuit includes a voltage generator configured to control a signal applied to the plurality of page buffers so that the read operation is performed according to positions of the plug holes.
A memory device including a memory block to which a plurality of lines are connected, the memory device comprising:
A method for operating a memory device including a memory block to which a plurality of lines are connected, wherein the memory block includes a plurality of memory cells respectively connected to word lines among the plurality of lines and a plurality of page buffers connected to the plurality of memory cells through a plurality of bit lines among the plurality of lines, and wherein the plurality of memory cells are formed as a plurality of plug holes formed in a stack structure between a drain select line among the plurality of lines and a slit, the method comprising:
Dependencies are inferred from the claim text.