RRAM circuit and method

A memory circuit comprising:

• a bias voltage generator comprising:
• a bias voltage node;
• an activation voltage generator comprising a resistive device;
• and
• a first amplifier;
• a drive circuit comprising a second amplifier comprising an input terminal coupled to the bias voltage node;
• and
• an array of resistive random-access memory (RRAM) devices,
• wherein
• the activation voltage generator and the first amplifier are configured to generate an activation voltage and a portion of a bias voltage level on the bias voltage node based on a resistance of the resistive device,
• the drive circuit is configured to output a drive voltage having the bias voltage level, and
• the memory circuit is configured to apply the activation voltage and the drive voltage to each RRAM device of the RRAM array.

A method of operating a resistive random-access memory (RRAM) circuit, the method comprising:

• using an activation voltage generator and a first amplifier to generate, based on a resistance value of a resistive device, a first portion of a bias voltage level on a bias voltage node and an activation voltage on a signal line of an RRAM array;
• using a second amplifier coupled to the bias voltage node to output a drive voltage having the bias voltage level to a first conduction line of the RRAM array;
• and
• in response to the activation voltage and the drive voltage, inducing a current in an RRAM device of the RRAM array coupled to each of the signal line and the first conduction line.