Integrated assemblies which include stacked memory decks, and methods of forming integrated assemblies

An apparatus, comprising:

• a first deck, wherein the first deck includes:
• first memory cells arranged in first tiers disposed one atop another;
• and
• first inner lateral edges;
• a second deck over the first deck, wherein the second deck includes:
• second memory cells arranged in second tiers disposed one atop another;
• and
• second inner lateral edges;
• an inter-deck structure between the first deck and the second deck, wherein the inter-deck structure includes:
• an inter-deck material having third inner lateral edges;
• and
• an etch-stop material against the first deck and having fourth inner lateral edges which are laterally offset relative to the first inner lateral edges and the second inner lateral edges;
• and
• a pillar passing through the first deck, the second deck, and the inter-deck structure, wherein the pillar includes a channel material, a tunneling material, a charge-storage material, a charge-blocking material, and a dielectric barrier material.

An apparatus, comprising:

• a first deck, wherein the first deck includes a first stack of alternating first and second materials;
• a second deck over the first deck, wherein the second deck includes a second stack of alternating third and fourth materials;
• an inter-deck structure between the first deck and the second deck, wherein the inter-deck structure includes:
• an etch-stop material against the first deck;
• and
• an inter-deck material, wherein the inter-deck material is softer than the third and fourth materials of the second deck;
• and
• a pillar passing through the first deck, the second deck, and the inter-deck structure, wherein the pillar includes a channel material, a tunneling material, a charge-storage material, a charge-blocking material, and a dielectric barrier material.