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US 12,010,835 B2Granted
Three-dimensional memory device with a conductive drain-select-level spacer and methods for forming the same
AssigneeSanDisk Technologies LLC
InventorsZhixin Cui, Satoshi Shimizu
Life of this patent
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Abstract
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, memory opening fill structures vertically extending through the alternating stack in a memory array region, and an electrically conductive spacer extending vertically and electrically connecting a first drain-select-level electrically conductive layer to a second drain-select-level electrically conductive layer.
Claims2
A three-dimensional memory device, comprising:
- an alternating stack of insulating layers and electrically conductive layers, wherein the electrically conductive layers comprise word-line-level electrically conductive layers and drain-select-level electrically conductive layers located above the word-line-level electrically conductive layers;
- a first backside trench fill structure extending along a first horizontal direction and comprising a first dielectric surface that contacts first sidewalls of each layer within the alternating stack;
- a second backside trench fill structure extending along the first horizontal direction, separated from the first backside trench fill structure along a second horizontal direction perpendicular to the first horizontal direction, and comprising a second dielectric surface that contacts second sidewalls of each layer within the alternating stack;
- a contact-level dielectric layer overlying the alternating stack;
- drain-select-level isolation structures extending through the contact-level dielectric layer and the drain-select-level electrically conductive layers but not through the word-line-level electrically conductive layers of the alternating stack, wherein the drain-select-level isolation structures extend in the first horizontal direction and are spaced apart along the second horizontal direction;
- memory opening fill structures vertically extending through the alternating stack in a memory array region in which each layer within the alternating stack is present, wherein each of the memory opening fill structures comprises a vertical semiconductor channel and a memory film, wherein an entirety of the memory opening fill structures underlies a bottom surface of the contact-level dielectric layer;
- an electrically conductive spacer extending vertically and electrically connecting a first drain-select-level electrically conductive layer of the drain-select-level electrically conductive layers to a second drain-select-level electrically conductive layer of the drain-select-level electrically conductive layers, wherein the electrically conductive spacer extends along the second horizontal direction and contacts ends of the first and the second drain-select-level electrically conductive layers along the second horizontal direction;
- and
- an additional electrically conductive spacer extending vertically and electrically connecting a third drain-select-level electrically conductive layer of the drain-select-level electrically conductive layers to a fourth drain-select-level electrically conductive layer of the drain-select-level electrically conductive layers.
6 more elements
Dependencies are inferred from the claim text.