Level shifter with low propagation delay

A level shifter, comprising:

• a low-level adjustment circuit, selectively pulling down a level of one between a first input node and a second input node to a first low supply voltage according to an input signal;
• a first comparator, outputting a one having higher level between the level of the first input node and a second low supply voltage to a first output node, wherein the second low supply voltage is higher than the first low supply voltage;
• and
• a high-level adjustment circuit, selectively adjusting the level of the first output node according to the level of the first input node and the level of the second input node to generate an output signal,
• wherein the first comparator circuit comprises:
• a first transistor, selectively turned on according to the level of the first input node to transmit the second low supply voltage to the first output node;
• and
• a second transistor, selectively turned on according to the level of the first input node to connect the first input node to the first output node.

A level shifter, comprising:

• a low-level adjustment circuit, selectively pulling down a level of one between a first input node and a second input node to a first low supply voltage according to an input signal;
• a first comparator, outputting a one having higher level between the level of the first input node and a second low supply voltage to a first output node, wherein the second low supply voltage is higher than the first low supply voltage;
• a high-level adjustment circuit, selectively adjusting the level of the first output node according to the level of the first input node and the level of the second input node to generate an output signal;
• a second comparator circuit, outputting a one having higher level between the level of the second input node and the second low supply voltage to a second output node,
• wherein the high-level adjustment circuit further selectively adjusts the level of the second output node according to the level of the first input node and the level of the second input node, and
• a selection circuit, selecting a corresponding node from the first output node and the second output node according to the level of the first output node and the level of the second output node, and generating the output signal according to a level of the corresponding node.