Semiconductor device and method

A method comprising:

• forming a multi-layer semiconductor stack on a semiconductor substrate, the multi-layer semiconductor stack comprising alternating first semiconductor layers and second semiconductor layers;
• etching the multi-layer semiconductor stack to form a first opening exposing the semiconductor substrate;
• forming an epitaxial material filling the first opening;
• removing a topmost first semiconductor layer of the first semiconductor layers;
• etching the multi-layer semiconductor stack and the epitaxial material to form a first nanostructure and a first fin, respectively;
• removing a topmost second semiconductor layer of the second semiconductor layers;
• forming gate stacks on the first nanostructure and the first fin;
• and
• forming source/drain regions in the first nanostructure and the first fin adjacent the gate stacks.

A method comprising:

• forming on a semiconductor substrate a multi-layer stack containing N layers, where N is an integer greater than two;
• etching the multi-layer stack to form a first recess in a first region exposing the semiconductor substrate;
• forming a first epitaxial material in the first recess;
• planarizing the first epitaxial material and the multi-layer stack with a first planarizing process, wherein the first planarizing process removes a topmost layer of the N layers of the multi-layer stack, while leaving N−1 layers of the multi-layer stack intact;
• patterning the N−1 layers of the multi-layer stack and the first epitaxial material to form a first nanostructure in a second region and a first fin in the first region;
• and
• planarizing the first nanostructure and the first fin with a second planarizing process, wherein the second planarizing process removes a topmost layer of the N−1 layers of the multi-layer stack, while leaving N−2 layers of the multi-layer stack intact.