Superjunction semiconductor device and method of manufacturing same
AssigneeDB HiTek Co., Ltd.
InventorsYong Sin Han, Myeong Bum Pyun
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Abstract
Disclosed are a superjunction semiconductor device and a method of manufacturing the same. More particularly, the present disclosure relates to a superjunction semiconductor device and a method of manufacturing the same, in which the device includes a field oxide layer having an uppermost end or surface that is higher than that of a gate oxide layer, between a gate electrode and a second pillar region in a cell region. This enables a reduction in gate-drain parasitic capacitance, thereby increasing switching speed and reducing switching loss.
Claims8
A method of manufacturing a superjunction semiconductor device, the method comprising:
- forming a second conductivity type epitaxial layer on a substrate;
- forming a plurality of first conductivity type pillars in the epitaxial layer;
- forming a first insulating layer on the epitaxial layer, and then forming a field oxide layer in a ring region and a gate insulating layer in a cell region by etching the first insulating layer using a first mask pattern;
- forming a second insulating layer on the epitaxial layer after forming the field oxide layer and the gate insulating layer;
- forming a gate layer on the field oxide layer, the gate insulating layer, and the second insulating layer;
- and
- forming a gate oxide layer and a gate electrode by sequentially etching the gate layer and the second insulating layer using a second mask pattern,
- wherein the gate insulating layer has at least one inclined surface extending obliquely upward.
A method of manufacturing a superjunction semiconductor device, the method comprising:
- forming a second conductivity type epitaxial layer on a substrate;
- forming a plurality of first conductivity type pillars in the epitaxial layer;
- forming a first insulating layer on the epitaxial layer, and then forming a field oxide layer in a ring region and a gate insulating layer in a cell region by etching the first insulating layer using a first mask pattern;
- forming a second insulating layer on the epitaxial layer after forming the field oxide layer and the gate insulating layer;
- forming a gate layer on the field oxide layer, the gate insulating layer, and the second insulating layer;
- and
- forming a gate oxide layer and a gate electrode by sequentially etching the gate layer and the second insulating layer using a second mask pattern, wherein:
- the gate insulating layer has at least one inclined surface extending obliquely upward, and
- the gate insulating layer has an uppermost end or surface that is higher than an uppermost end or surface of the gate oxide layer.
Dependencies are inferred from the claim text.