US 12,009,391 B2 · Nanosheet field-effect transistor device and method of forming

Abstract

A semiconductor device includes: a fin protruding above a substrate; source/drain regions over the fin; nanosheets between the source/drain regions; and a gate structure over the fin and between the source/drain regions, the gate structure including: a gate dielectric material around each of the nanosheets; a work function material around the gate dielectric material; a liner material around the work function material, where the liner material has a non-uniform thickness and is thicker at a first location between the nanosheets than at a second location along sidewalls of the nanosheets; and a gate electrode material around at least portions of the liner material.

Claims20

Dependent claims

A semiconductor device comprising:

a fin protruding above a substrate;
source/drain regions over the fin;
nanosheets between the source/drain regions;
and
a gate structure over the fin and between the source/drain regions, the gate structure comprising:
a gate dielectric material around each of the nanosheets;
a work function material around the gate dielectric material;
a liner material around the work function material, wherein the liner material has a non-uniform thickness and is thicker at a first location between the nanosheets than at a second location along sidewalls of the nanosheets;
and
a gate electrode material around at least portions of the liner material.

7 more elements

A semiconductor device comprising:

a fin protruding above a substrate;
a gate structure over the fin;
source/drain regions over the fin on opposing sides of the gate structure;
and
a first channel layer and a second channel layer disposed between the source/drain regions and over the fin, wherein the first channel layer is between the second channel layer and the fin, wherein the gate structure comprises:
a gate dielectric material wrapping around the first channel layer and the second channel layer;
a work function material wrapping around the gate dielectric material;
a liner material wrapping around the work function material, wherein the work function material wrapping around the first channel layer is disposed between the first channel layer and the liner material wrapping around the first channel layer, wherein the work function material wrapping around the second channel layer is disposed between the second channel layer and the liner material wrapping around the second channel layer, wherein the liner material has a first thickness over an upper surface of the second channel layer distal from the fin, and has a second thickness between the first channel layer and the second channel layer, wherein the first thickness is smaller than the second thickness;
and
a gate electrode.

7 more elements

Dependencies are inferred from the claim text.

Facts

Application

17/341,034Filed 7 Jun 2021 · us provisional application

Priority

14 Apr 2021

Published

US 2022/0336584 A120 Oct 2022

Granted

11 Jun 2024

Term ends

Not estimatedThe source records don’t support an estimate.

Classification17 codes

H10D 62/121
Nanowire, nanosheet or nanotube semiconductor bodies: oriented parallel to substrates
H10D 30/0191
Of FETs having stacked nanowire, nanosheet or nanoribbon channels: forming stacked channels, e.g. changing their shapes or sizes
H10D 30/024
Of FETs having insulated gates [IGFET]: of fin field-effect transistors [FinFET]
H10D 30/501
Field-effect transistors [FET]: fETs having stacked nanowire, nanosheet or nanoribbon channels

Nanosheet field-effect transistor device and method of forming

Life of this patent

Nanosheet field-effect transistor device and method of forming

Life of this patent

Abstract

Claims20