Edge termination for power semiconductor devices and related fabrication methods

A power semiconductor device, comprising:

• a semiconductor layer structure comprising a semiconductor drift region of a first conductivity type and an edge termination region comprising a plurality of guard rings of a second conductivity type in the semiconductor drift region,
• wherein one or more of the guard rings respectively comprise a first portion adjacent a surface of the semiconductor layer structure and a second portion spaced from the surface of the semiconductor layer structure, wherein the second portion comprises a higher concentration of dopants of the second conductivity type than the first portion.

A power semiconductor device, comprising:

• a semiconductor layer structure comprising a semiconductor drift region of a first conductivity type and an edge termination region comprising a plurality of guard rings of a second conductivity type in the semiconductor drift region,
• wherein one or more of the guard rings respectively comprise a first portion adjacent a surface of the semiconductor layer structure, a second portion spaced from the surface of the semiconductor layer structure, and a sidewall, wherein the sidewall of a respective guard ring comprises a step difference between the first and second portions.

A power semiconductor device, comprising:

• a semiconductor layer structure comprising a semiconductor drift region of a first conductivity type and an edge termination region comprising a plurality of guard rings of a second conductivity type in the semiconductor drift region,
• wherein one or more of the guard rings respectively comprise a first width adjacent a surface of the semiconductor layer structure and a second width spaced from the surface of the semiconductor layer structure, and wherein a ratio of the first width to the second width is about 0.95 to about 2.