Back to results
US 12,009,293 B2Granted
Barrier-free interconnect structure and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsPei-Yu Wang, Cheng-Ting Chung, Wei Ju Lee
Life of this patent
Estimating the term…
Abstract
Semiconductor devices and method of forming the same are disclosed herein. A semiconductor device according to the present disclosure includes a first dielectric layer having a first top surface and a contact via extending through the first dielectric layer and rising above the first top surface of the first dielectric layer.
Claims20
A method, comprising:
- forming a first dielectric layer over a contact feature using flowable chemical vapor deposition (FCVD) or spin-on coating, the first dielectric layer comprising a first top surface;
- forming a contact via extending through the first dielectric layer and having a second top surface above the first top surface of the first dielectric layer;
- depositing a barrier layer over the first dielectric layer and the contact via;
- planarizing the barrier layer by chemical mechanical polishing to expose the first top surface of the contact via while the first dielectric layer remains covered by the barrier layer;
- and
- after the planarizing, patterning the barrier layer to form a patterned barrier layer and expose a portion of the first dielectric layer.
3 more elements
A method, comprising:
- forming a metal etch stop layer over a contact feature;
- forming a first dielectric layer over the metal etch stop layer;
- forming a contact via extending through the metal etch stop layer and the first dielectric layer and having a first top surface above a second top surface of the first dielectric layer;
- depositing a barrier layer over the first dielectric layer and the contact via;
- planarizing the barrier layer to expose the first top surface of the contact via;
- depositing an etch stop layer over the barrier layer;
- depositing a second dielectric layer over the etch stop layer;
- forming a trench through the etch stop layer and the second dielectric layer to expose the first top surface of the contact via;
- and
- depositing a conductive feature in the trench.
7 more elements
A method, comprising:
- receiving a workpiece comprising:
- a first etch stop layer, and
- a first dielectric layer over the first etch stop layer;
- forming a via opening through the first etch stop layer and the first dielectric layer along a vertical direction;
- forming a contact via in the via opening such that a top surface of the contact via rises above a top surface of the first dielectric layer;
- depositing a barrier layer over the first dielectric layer and the contact via;
- planarizing the barrier layer to expose the top surface of the contact via;
- patterning the planarized barrier layer such that the patterned barrier layer comprises a circular shape when viewed along the vertical direction;
- depositing a second etch stop layer over the patterned barrier layer;
- depositing a second dielectric layer over the second etch stop layer;
- forming a trench through the etch stop layer and the second dielectric layer to expose the top surface of the contact via and a portion of the second etch stop layer;
- and
- depositing a conductive feature in the trench.
10 more elements
Dependencies are inferred from the claim text.