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US 12,009,277 B2Granted
Semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorsDong Kyu Kim, Jung-Ho Park, Jong Youn Kim, Yeon Ho Jang, Jae Gwon Jang
Life of this patent
Estimating the term…
Abstract
A semiconductor package includes a first semiconductor chip and a second semiconductor chip on a substrate, a barrier layer on the first semiconductor chip and the second semiconductor chip, the barrier layer having an opening through which at least a part of the first semiconductor chip is exposed, and a heat transfer part on the barrier layer, the heat transfer part extending along an upper face of the barrier layer and filling the opening.
Claims20
A semiconductor package, comprising:
- a first semiconductor chip and a second semiconductor chip on a substrate, the first and second semiconductor chips being equal in thickness such that uppermost faces of the first and second semiconductor chips are located at a same height from the substrate;
- a barrier layer having an opening that exposes a first portion of the uppermost face of the first semiconductor chip, the barrier layer being in contact with a second portion of the uppermost face of the first semiconductor chip not exposed by the opening and an entirety of the uppermost face of the second semiconductor chip and;
- and
- a heat transfer part on the barrier layer, the heat transfer part extending along an upper face of the barrier layer and filling the opening.
1 more element
A semiconductor package, comprising:
- a first semiconductor chip on a substrate, the first semiconductor chip having an uppermost face located at a first height from the substrate;
- a second semiconductor chip on the substrate, the second semiconductor chip having an uppermost face located at the first height from the substrate such that the uppermost faces of the first and second semiconductor chips are located at a same level;
- a heat transfer part on the first semiconductor chip and the second semiconductor chip, the heat transfer part being in contact with the uppermost face of the first semiconductor chip, and not contacting the second semiconductor chip;
- and
- a heat slug in contact with at least a portion of the heat transfer part.
2 more elements
A semiconductor package, comprising:
- a substrate;
- a first semiconductor chip on the substrate;
- a second semiconductor chip on the substrate, an uppermost face of the second semiconductor chip being located at a same height as an uppermost face of the first semiconductor chip;
- a molding part on the substrate, wrapping the first semiconductor chip and the second semiconductor chip, and exposing the uppermost face of the first semiconductor chip and the uppermost face of the second semiconductor chip, an uppermost face of the molding part being located at the same height as the uppermost face of the first semiconductor chip;
- a barrier layer including an opening through which a first portion of the uppermost face of the first semiconductor chip is exposed, the barrier layer covering the second semiconductor chip and a second portion of the uppermost face of the first semiconductor chip not exposed by the opening;
- and
- a heat transfer part on the barrier layer and in direct contact with the first portion of the uppermost face of the first semiconductor chip exposed by the opening.
4 more elements
Dependencies are inferred from the claim text.