Adjusting work function through adjusting deposition temperature

A device, comprising:

• a first transistor, comprising:
• a first semiconductor region;
• a first high-k dielectric over the first semiconductor region;
• and
• a first work-function layer over and contacting the first high-k dielectric, wherein the first work-function layer has a first work function, and wherein the first work-function layer has a first (200)/(111) signal intensity ratio;
• and
• a second transistor, comprising:
• a second semiconductor region;
• a second high-k dielectric over and contacting the second semiconductor region;
• and
• a second work-function layer over and contacting the second high-k dielectric, wherein the first work-function layer and the second work-function layer comprise a same material, wherein the second work-function layer has a second work function higher than the first work function, and wherein the second work-function layer has a second (200)/(111) signal intensity ratio smaller than the first (200)/(111) signal intensity ratio.

A device, comprising:

• a first transistor, comprising:
• a first semiconductor region;
• and
• a first gate electrode over the first semiconductor region, the first gate electrode comprising a first portion of a first p-type work-function layer having a first (200)/(100) signal intensity ratio, wherein the first gate electrode has a first work function;
• a second transistor, comprising:
• a second semiconductor region;
• and
• a second gate electrode over the second semiconductor region, the second gate electrode comprising a first portion of a second p-type work-function layer having a second (200)/(100) signal intensity ratio, wherein the second (200)/(100) signal intensity ratio is greater than the first (200)/(100) signal intensity ratio by a difference greater than 0.35, wherein the second gate electrode has a second work function higher than the first work function;
• and
• a third transistor, comprising:
• a third semiconductor region;
• and
• a third gate electrode over the third semiconductor region, wherein the third gate electrode has a third work function, and wherein the third work function is smaller than the first work function and the second work function.