Semiconductor devices including low-k metal gate isolation and methods of fabrication thereof

A method for forming a semiconductor device, comprising:

• depositing an interlayer dielectric (ILD) layer over first and second source/drain features;
• forming a first source/drain metal contact in the ILD layer and in contact with the first source/drain feature;
• etching back the first source/drain metal contact;
• depositing a first isolation feature over the first source/drain metal contact;
• depositing a sacrificial metal contact etch stop layer (M-CESL) over the first solation feature and ILD layer;
• patterning the sacrificial M-CESL and removing the first isolation feature;
• forming a conductive feature on the first source/drain metal contact, wherein a first portion of the conductive feature is embedded in the sacrificial M-CESL, a second portion of the conductive feature is embedded in the ILD layer, and the first portion is wider than the second portion;
• and
• replacing the sacrificial M-CESL with a low-k dielectric layer, wherein the low-k dielectric layer has having a top surface and a lower surface, the lower surface is in contact with the ILD layer, and a first portion of the low-k dielectric layer extends upward from the lower surface.

A method for forming a semiconductor device, comprising:

• forming first and second source/drain features;
• depositing a first interlayer dielectric layer (ILD) over the first and second source/drain features;
• forming a gate electrode layer between the first and second source/drain features;
• forming a sacrificial self-aligned contact (SAC) layer above the gate electrode layer;
• forming first and second source/drain metal contacts above the first and second source/drain features and through the first ILD layer, wherein first and second sidewall spacers are disposed between the gate electrode layer and the first and second source/drain metal contacts;
• depositing a sacrificial metal contact etch stop layer (M-CESL) above the SAC layer;
• depositing a sacrificial ILD layer over the sacrificial M-CESL;
• and
• forming a conductive feature, wherein the conductive feature has a first portion embedded in the sacrificial M-CESL and a second portion in contact with the first source/drain metal contact, and the first portion of the conductive feature is in contact with the SAC layer;
• removing the sacrificial ILD layer;
• replacing the sacrificial M-CESL with a low-k dielectric material;
• and
• replacing the sacrificial SAC layer with the low-k dielectric material.