Data transmission apparatus and method having clock gating mechanism
AssigneeRealtek Semiconductor Corp.
InventorsFu-Chin Tsai, Ger-Chih Chou, Chun-Chi Yu, Chih-Wei Chang, Shih-Han Lin
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AssigneeRealtek Semiconductor Corp.
InventorsFu-Chin Tsai, Ger-Chih Chou, Chun-Chi Yu, Chih-Wei Chang, Shih-Han Lin
Estimating the term…
The present invention discloses a data transmission apparatus having clock gating mechanism. Each of data transmission circuits has a flip-flop depth of N and receives a write clock signal and one of read clock signals to receive and output one of data signals. A write clock gating circuit receives a write clock gating enabling signal to transmit the write clock signal to the data transmission circuits. Each of read clock gating circuits receives one of read clock gating enabling signals to transmit one of the read clock signals. The gating signal transmission circuit has a flip-flop depth of N+M and receives the write and the read clock signals to receive the write clock gating enabling signal and output the read clock gating enabling signals. A largest timing difference among the read clock signals is P clock cycles and M is at least ┌P┐.
A data transmission apparatus having clock gating mechanism, comprising:
A data transmission method having clock gating mechanism and used in a data transmission apparatus, comprising:
Dependencies are inferred from the claim text.