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US 12,009,030 B2Granted
Content addressable memory cell
AssigneeRealtek Semiconductor Corp.
InventorI-Hao Chiang
Life of this patent
Estimating the term…
Abstract
A content addressable memory cell includes storage circuits and a comparator circuit. A first storage circuit of the storage circuits is configured to store data, and a second storage circuit of the storage circuits is configured to store a state bit. The comparator circuit is configured to determine whether to adjust a level of a match line to a level of one of the data and the state bit in response to levels of search bit lines and another one of the data and the state bit.
Claims17
A content addressable memory cell, comprising:
- a plurality of storage circuits, wherein a first storage circuit in the plurality of storage circuits is configured to store data, and a second storage circuit in the plurality of storage circuits is configured to store a state bit;
- and
- a comparison circuit configured to determine whether to adjust a level of a match line to a level of one of the data and the state bit in response to levels of the plurality of search bit lines and a level of another one of the data and the state bit.
A content addressable memory cell, comprising:
- a plurality of storage circuits, wherein a first storage circuit in the plurality of storage circuits is configured to store data, and a second storage circuit in the plurality of storage circuits is configured to store a state bit;
- a first switch, wherein a first terminal of the first switch is coupled to a match line;
- a second switch, wherein a first terminal of the second switch is coupled to the match line;
- a third switch, wherein a first terminal of the third switch is coupled to a second terminal of the first switch, and a control terminal of the third switch is coupled to a first search bit line;
- and
- a fourth switch, wherein a first terminal of the fourth switch is coupled to a second terminal of the second switch, and a control terminal of the fourth switch is coupled to a second search bit line,
- wherein if a control terminal of the first switch receives a first data value of the data and a control terminal of the second switch receives a second data value of the data, a second terminal of the third switch and a second terminal of the fourth switch receive the state bit, or
- if the control terminal of the first switch and the control terminal of the second switch receive the state bit, the second terminal of the third switch receives the second data value, and the second terminal of the fourth switch receive the first data value.
5 more elements
Dependencies are inferred from the claim text.