Pixel circuit and display device including the same

A display device comprising:

• a display panel including a plurality of data lines, a plurality of gate lines crossing the plurality of data lines, a plurality of power lines, and a plurality of pixel circuits connected to the plurality of data lines, the plurality of gate lines, and the plurality of power lines;
• a data driver configured to supply a data voltage of pixel data to the plurality of data lines;
• and
• a gate driver configured to supply a gate signal to the plurality of gate lines,
• wherein the plurality of power lines include:
• a VDD line to which a pixel driving voltage is applied;
• and
• a VSS line to which a low-potential power supply voltage is applied,
• wherein each of the plurality of pixel circuits includes:
• a driving element which includes a first electrode of the driving element that is connected to a first node to which the pixel driving voltage is applied, a gate electrode of the driving element that is connected to a second node, and a second electrode of the driving element that is connected to a third node, the driving element configured to supply an electric current to a light emitting element;
• a first switch element configured to discharge the second node, the first switch element including a gate electrode, a first electrode connected to the gate electrode of the driving element at the second node, and a second electrode connected to a VSS node to which a low-potential power supply voltage is applied;
• a light emitting element including an anode electrode connected to the second electrode of the driving element at the third node and a cathode electrode connected to the second electrode of the first switch element at the VSS node;
• a storage capacitor including a first electrode connected to the first electrode of the first switch element and the gate electrode of the driving element at the second node and a second electrode connected to the anode electrode of the light emitting element and the second electrode of the driving element at the third node;
• and
• a second switch element configured to supply a data voltage to the second node.