Gate drive circuits and display panels
AssigneeWuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
InventorsBin Yuan, Fang Qin, Cheng Chen
Life of this patent
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Abstract
A gate drive circuit includes a plurality of gate drive units. Each of the gate drive units includes a stage transmission signal selection circuit, a pull-up control circuit, a pulse number reduction circuit, a first inversion circuit, a first output stage, and a second output stage, and can output a second gate control signal with a greater number of pulses and a first gate control signal with a less number of pulses. At least one of the stage transmission signal selection circuit, the first inversion circuit or the second output stage includes three transistors with the same channel type.
Claims20
A display panel comprising:
- a pixel circuit comprising a writing transistor for controlling input of a data signal and a compensation transistor for controlling input of the data signal to a gate of a drive transistor;
- and
- a gate drive circuit comprising a plurality of cascaded gate drive units, wherein each of the gate drive units comprises:
- a stage transmission signal selection circuit electrically connected between a first wiring and a first node;
- a pull-up control circuit configured to control a potential of a second node based on a potential of the first node and a potential of a first clock signal;
- a pulse number reduction circuit electrically connected between the second node and a third node, the pulse number reduction circuit having a control terminal electrically connected to a reset line;
- a first inversion circuit connected between the second node and a fourth node;
- a first output stage configured to output a first gate control signal based on a potential of the third node and a potential of the fourth node;
- and
- a second output stage configured to output a second gate control signal based on the potential of the second node,
- wherein a number of pulses of the second gate control signal in one frame is greater than a number of pulses of the first gate control signal in one frame,
- at least one of the stage transmission signal selection circuit, the first inversion circuit or the second output stage comprises three transistors with a same channel type, and
- the first output stage has an output terminal electrically connected to a gate of the writing transistor, and the second output stage has an output terminal electrically connected to a gate of the compensation transistor.
A gate drive circuit comprising a plurality of cascaded gate drive units, wherein each of the gate drive units comprises:
- a stage transmission signal selection circuit electrically connected between a first wiring and a first node;
- a pull-up control circuit configured to control a potential of a second node based on a potential of the first node and a potential of a first clock signal;
- a pulse number reduction circuit electrically connected between the second node and a third node, the pulse number reduction circuit having a control terminal electrically connected to a reset line;
- a first inversion circuit connected between the second node and a fourth node;
- a first output stage configured to output a first gate control signal based on a potential of the third node and a potential of the fourth node;
- and
- a second output stage configured to output a second gate control signal based on the potential of the second node,
- wherein a number of pulses of the second gate control signal in one frame is greater than a number of pulses of the first gate control signal in one frame;
- and
- at least one of the stage transmission signal selection circuit, the first inversion circuit or the second output stage comprises three transistors with a same channel type.
Dependencies are inferred from the claim text.