Display device and mother substrate for display device

A display device comprising:

• a display area, a first non-display area located on a side of the display area in a first direction, and a second non-display area located on another side of the display area in the first direction;
• a first bus pattern and a second bus pattern disposed in the first non-display area and spaced apart from each other;
• a third bus pattern and a fourth bus pattern disposed in the second non-display area and spaced apart from each other;
• a first voltage line disposed in the display area and electrically connected to the first bus pattern and the third bus pattern;
• a second voltage line disposed in the display area and electrically connected to the second bus pattern and the fourth bus pattern;
• a first test pad disposed between the first bus pattern and the second bus pattern in the first non-display area;
• and
• a first alignment dummy pattern electrically connected to the third bus pattern and a second alignment dummy pattern electrically connected to the fourth bus pattern in the second non-display area.

A mother substrate for a display device, the mother substrate comprising:

• a cell area that is defined by a cutting line and comprises a display area, a first non-display area located on a side of the display area in a first direction and a second non-display area located on another side of the display area in the first direction, and a cell peripheral area;
• a first bus pattern and a second bus pattern disposed in the first non-display area and spaced apart from each other;
• a third bus pattern and a fourth bus pattern disposed in the second non-display area and spaced apart from each other;
• a first voltage line disposed in the display area and electrically connected to the first bus pattern and the third bus pattern;
• a second voltage line disposed in the display area and electrically connected to the second bus pattern and the fourth bus pattern;
• a first test pad disposed between the first bus pattern and the second bus pattern in the first non-display area;
• and
• a first alignment pad and a second alignment pad disposed in the cell peripheral area adjacent to the second non-display area.