Load instruction fusion

A method, comprising:

• detecting, by a processor of a computer system, a first instruction to load a value of a memory of the computer system;
• detecting, by the processor, a conditional branch instruction that depends on the value to be loaded by the first instruction;
• fusing, by the processor, the first instruction with the conditional branch instruction such that at least a comparison operation that is defined by the conditional branch instruction is to be executed in a load/store circuit of the processor;
• loading, by the load/store circuit, the value from the memory;
• providing, by the load/store circuit to a branch execution circuit of the processor, a pointer to an entry in a table circuit, wherein the entry stores information about the conditional branch instruction;
• receiving, by the load/store circuit from the branch execution circuit, an indication of a type of the conditional branch instruction;
• executing, by the load/store circuit, the comparison operation on the loaded value, wherein the indication enables the load/store circuit to execute the comparison operation;
• and
• providing, by the processor, a result of the comparison operation to the branch execution circuit.

A system, comprising:

• a memory;
• and
• a hardware processor that is coupled to the memory, includes a fusion table circuit, and is configured to:
• detect a first instruction to load a value of the memory;
• detect a non-load/non-store instruction that depends on the value to be loaded by the first instruction;
• fuse the first instruction and the non-load/non-store instruction such that one or more operations that the non-load/non-store instruction is defined to perform are to be executed in a load/store circuit of the hardware processor;
• store, in an entry in the fusion table circuit, information that describes the fused first instruction and the non-load/non-store instruction;
• provide, to the load/store circuit, an indication of the fused first instruction and the non-load/non-store instruction, wherein the indication includes an index value that identifies the entry in the fusion table circuit;
• load, in the load/store circuit, the value from the memory;
• and
• execute, in the load/store circuit, the one or more operations on the value.