Update of boot code handlers
AssigneeIntel Corporation
InventorsSarathy Jayakumar, Mohan J. Kumar, Murugasamy K. Nachimuthu, Michael A. Rothman
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AssigneeIntel Corporation
InventorsSarathy Jayakumar, Mohan J. Kumar, Murugasamy K. Nachimuthu, Michael A. Rothman
Estimating the term…
Examples described herein provide a central processing unit (CPU) to reserve a region of memory for use to store both a boot firmware code and a second boot firmware code and to perform the second boot firmware code without reboot. The reserved region of memory can be a region that is not configured for access by an operating system (OS). The reserved region of memory comprises System Management Random Access Memory (SMRAM). If a first interrupt handler is not overwritten after a second boot firmware code is stored, the CPU can roll back to use of the first interrupt handler.
An apparatus comprising:
A method comprising:
At least one non-transitory computer-readable medium, comprising instructions stored thereon, that if executed by one or more processors, cause the one or more processors to:
Dependencies are inferred from the claim text.