Multi-input configurable logic cell with configurable output region

A multi-function configurable circuit, comprising:

• an input selection region, including a set of four input multiplexers, that selects and routes input signals;
• a computation region that includes a set of four four-input lookup tables, each lookup table being coupled to selected signals from the input selection region to generate a respective output signal, with the computation region being split to perform multiple logic operations;
• a switching region that includes a set of output multiplexers, each output multiplexer being coupled to a respective set of output signals from the set of lookup tables to provide circuit outputs responsive to respective output selection signals;
• and
• an output region that includes a domino logic stage, having a set of transistors, coupled to the output signals from the set of lookup tables to provide circuit outputs that determine combinations of the signals output by the set of lookup tables, wherein only one of the switching region or the output region is active for any given operation.

A configurable circuit product, the configurable circuit product having a non-transitory machine-readable storage medium that stores circuit configuration instructions, the circuit configuration instructions being readable by a field programmable gate array device to initialize a circuit that comprises:

• an input selection region, including a set of input multiplexers, that selects and routes input signals;
• a computation region that includes a set of lookup tables, each lookup table being coupled to selected signals from the input selection region to generate a respective output signal;
• a switching region that includes a set of output multiplexers, each output multiplexer being coupled to output signals from the set of lookup tables to provide circuit outputs responsive to respective output selection signals;
• and
• an output region that includes a domino logic stage, having a set of transistors, coupled to the output signals from the set of lookup tables to provide circuit outputs that determine combinations of the signals output by the set of lookup tables, wherein only one of the switching region or the output region is active for any given operation.